Presented at
33C3 (2016),
Dec. 27, 2016, 11:30 a.m.
(60 minutes).
Hardware is often considered as an abstract layer that behaves correctly, just executing instructions and outputting a result. However, the internal state of the hardware leaks information about the programs that are executing. In this talk, we focus on how to extract information from the execution of simple x86 instructions that do not require any privileges. Beyond classical cache-based side-channel attacks, we demonstrate how to perform cache attacks without a single memory access, as well as how to bypass kernel ASLR. This talk does not require any knowledge about assembly. We promise.
When hunting for bugs, the focus is mostly on the software layer. On the other hand, hardware is often considered as an abstract layer that behaves correctly, just executing instructions and outputing a result. However, the internal state of the hardware leaks information about the programs that are running. Unlike software bugs, these bugs are not easy to patch on current hardware, and manufacturers are also reluctant to fix them in future generations, as they are tightly tied with performance optimizations.
In this talk, we focus on how to extract information from the execution of simple x86 instructions that do not require any privileges. The most studied microarchitectural attacks are beyond doubt cache attacks. Indeed, the timing of a memory access depends heavily on the state of the CPU cache. But beyond memory accesses that are the base of classical cache-based side-channel attacks, other x86 instructions leak information about the internal state of the hardware, and thus about running programs. First, we present side channels caused by the "clflush" instruction, that flushes all content of the cache. We will explain how it can be used to perform side-channel attacks that are faster and stealthier than their classical counterpart, without performing so much as a single memory access [1]. Second, we present side channels caused by the prefetch instructions. We will explain how these instructions can be used to translate virtual addresses to physical addresses - without the use of the proc interface that is restricted today -, and to bypass kernel ASLR [2].
This talk does not require any knowledge about assembly. We promise.
The talk will be given as a joint presentation by Clémentine Maurice and Moritz Lipp.
[1] Daniel Gruss, Clémentine Maurice, Klaus Wagner and Stefan Mangard, "Flush+Flush: A Fast and Stealthy Cache Attack", DIMVA 2016
[2] Daniel Gruss, Clémentine Maurice, Anders Fogh, Moritz Lipp, Stefan Mangard, "Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR", CCS 2016
Presenters:
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Clémentine Maurice
Postdoctoral researcher at the Graz University of Technology, Austria.
Clémentine Maurice is a researcher in infosec. She obtained her PhD from Telecom ParisTech in October 2015 while working at Technicolor in Rennes, jointly with the S3 group of Eurecom in Sophia Antipolis. She is now working as a postdoctoral researcher in the Secure Systems group at the Graz University of Technology, in Austria. Among other topics, she is interested in microarchitectural covert and side channels and reverse-engineering processor parts. She led the research on Rowhammer hardware fault attacks in JavaScript through a remote website, an attack also known as Rowhammer.js. She presented her work on several academic conferences, as well as BlackHat Europe and the CCC.
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Moritz Lipp
Moritz Lipp is a researcher in infosec at Graz University of Technology. He has received his master's degree on computer science with a strong focus on infosec in 2016. In the past he has been invited to teach in infosec courses on undergraduate and graduate level. His research has been published at top academic conferences like Usenix Security and been presented on blackhat Europe. In his current research, he focuses on side-channel attacks on mobile devices.
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